
use crate::metadata::ir::*;
pub(crate) static REGISTERS: IR = IR {
    blocks: &[Block {
        name: "Adc",
        extends: None,
        description: Some("Analog to Digital Converter instance 1"),
        items: &[
            BlockItem {
                name: "isr",
                description: Some("ADC interrupt and status register"),
                array: None,
                byte_offset: 0x0,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Isr"),
                }),
            },
            BlockItem {
                name: "ier",
                description: Some("ADC interrupt enable register"),
                array: None,
                byte_offset: 0x4,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Ier"),
                }),
            },
            BlockItem {
                name: "cr",
                description: Some("ADC control register"),
                array: None,
                byte_offset: 0x8,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr"),
                }),
            },
            BlockItem {
                name: "cfgr1",
                description: Some("ADC configuration register 1"),
                array: None,
                byte_offset: 0xc,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cfgr1"),
                }),
            },
            BlockItem {
                name: "cfgr2",
                description: Some("ADC configuration register 2"),
                array: None,
                byte_offset: 0x10,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cfgr2"),
                }),
            },
            BlockItem {
                name: "smpr",
                description: Some("ADC sampling time register"),
                array: None,
                byte_offset: 0x14,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Smpr"),
                }),
            },
            BlockItem {
                name: "awd1tr",
                description: Some("watchdog threshold register"),
                array: None,
                byte_offset: 0x20,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Awd1tr"),
                }),
            },
            BlockItem {
                name: "awd2tr",
                description: Some("watchdog threshold register"),
                array: None,
                byte_offset: 0x24,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Awd2tr"),
                }),
            },
            BlockItem {
                name: "chselr",
                description: Some("channel selection register"),
                array: None,
                byte_offset: 0x28,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Chselr"),
                }),
            },
            BlockItem {
                name: "chselr_1",
                description: Some("channel selection register CHSELRMOD = 1 in ADC_CFGR1"),
                array: None,
                byte_offset: 0x28,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Chselr1"),
                }),
            },
            BlockItem {
                name: "awd3tr",
                description: Some("watchdog threshold register"),
                array: None,
                byte_offset: 0x2c,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Awd3tr"),
                }),
            },
            BlockItem {
                name: "dr",
                description: Some("ADC group regular conversion data register"),
                array: None,
                byte_offset: 0x40,
                inner: BlockItemInner::Register(Register {
                    access: Access::Read,
                    bit_size: 32,
                    fieldset: Some("Dr"),
                }),
            },
            BlockItem {
                name: "awd2cr",
                description: Some("ADC analog watchdog 2 configuration register"),
                array: None,
                byte_offset: 0xa0,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Awd2cr"),
                }),
            },
            BlockItem {
                name: "awd3cr",
                description: Some("ADC analog watchdog 3 configuration register"),
                array: None,
                byte_offset: 0xa4,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Awd3cr"),
                }),
            },
            BlockItem {
                name: "calfact",
                description: Some("ADC calibration factors register"),
                array: None,
                byte_offset: 0xb4,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Calfact"),
                }),
            },
            BlockItem {
                name: "ccr",
                description: Some("ADC common control register"),
                array: None,
                byte_offset: 0x308,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Ccr"),
                }),
            },
        ],
    }],
    fieldsets: &[
        FieldSet {
            name: "Awd1tr",
            extends: None,
            description: Some("watchdog threshold register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lt1",
                    description: Some("ADC analog watchdog 1 threshold low"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ht1",
                    description: Some("ADC analog watchdog 1 threshold high"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Awd2cr",
            extends: None,
            description: Some("ADC analog watchdog 2 configuration register"),
            bit_size: 32,
            fields: &[Field {
                name: "awd2ch",
                description: Some("ADC analog watchdog 2 monitored channel selection"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 19,
                array: None,
                enumm: None,
            }],
        },
        FieldSet {
            name: "Awd2tr",
            extends: None,
            description: Some("watchdog threshold register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lt2",
                    description: Some("ADC analog watchdog 2 threshold low"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ht2",
                    description: Some("ADC analog watchdog 2 threshold high"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Awd3cr",
            extends: None,
            description: Some("ADC analog watchdog 3 configuration register"),
            bit_size: 32,
            fields: &[Field {
                name: "awd3ch",
                description: Some("ADC analog watchdog 3 monitored channel selection"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 19,
                array: None,
                enumm: None,
            }],
        },
        FieldSet {
            name: "Awd3tr",
            extends: None,
            description: Some("watchdog threshold register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lt3",
                    description: Some("ADC analog watchdog 3 threshold high"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ht3",
                    description: Some("ADC analog watchdog 3 threshold high"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
                    bit_size: 12,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Calfact",
            extends: None,
            description: Some("ADC calibration factors register"),
            bit_size: 32,
            fields: &[Field {
                name: "calfact",
                description: Some("ADC calibration factor in single-ended mode"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 7,
                array: None,
                enumm: None,
            }],
        },
        FieldSet {
            name: "Ccr",
            extends: None,
            description: Some("ADC common control register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "presc",
                    description: Some("ADC prescaler"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
                    bit_size: 4,
                    array: None,
                    enumm: Some("Presc"),
                },
                Field {
                    name: "vrefen",
                    description: Some("VREFINT enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tsen",
                    description: Some("Temperature sensor enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "vbaten",
                    description: Some("VBAT enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cfgr1",
            extends: None,
            description: Some("ADC configuration register 1"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "dmaen",
                    description: Some("ADC DMA transfer enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "dmacfg",
                    description: Some("Direct memory access configuration"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Dmacfg"),
                },
                Field {
                    name: "scandir",
                    description: Some("Scan sequence direction"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Scandir"),
                },
                Field {
                    name: "res",
                    description: Some("ADC data resolution"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
                    bit_size: 2,
                    array: None,
                    enumm: Some("Res"),
                },
                Field {
                    name: "align",
                    description: Some("ADC data alignement"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Align"),
                },
                Field {
                    name: "extsel",
                    description: Some("ADC group regular external trigger source"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
                    bit_size: 3,
                    array: None,
                    enumm: Some("Extsel"),
                },
                Field {
                    name: "exten",
                    description: Some("ADC group regular external trigger polarity"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 2,
                    array: None,
                    enumm: Some("Exten"),
                },
                Field {
                    name: "ovrmod",
                    description: Some("ADC group regular overrun configuration"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "cont",
                    description: Some("Continuous conversion"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "wait",
                    description: Some("Wait conversion mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "autoff",
                    description: Some("Auto-off mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "discen",
                    description: Some("ADC group regular sequencer discontinuous mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "chselrmod",
                    description: Some("Mode selection of the ADC_CHSELR register"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd1sgl",
                    description: Some("ADC analog watchdog 1 monitoring a single channel or all channels"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd1en",
                    description: Some("ADC analog watchdog 1 enable on scope ADC group regular"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd1ch",
                    description: Some("ADC analog watchdog 1 monitored channel selection"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 26 }),
                    bit_size: 5,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cfgr2",
            extends: None,
            description: Some("ADC configuration register 2"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "ovse",
                    description: Some("ADC oversampler enable on scope ADC group regular"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ovsr",
                    description: Some("ADC oversampling ratio"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 3,
                    array: None,
                    enumm: Some("Ovsr"),
                },
                Field {
                    name: "ovss",
                    description: Some("ADC oversampling shift"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 4,
                    array: None,
                    enumm: Some("Ovss"),
                },
                Field {
                    name: "tovs",
                    description: Some("ADC oversampling discontinuous mode (triggered mode) for ADC group regular"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "lftrig",
                    description: Some("Low frequency trigger mode enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 29 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ckmode",
                    description: Some("ADC clock mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 30 }),
                    bit_size: 2,
                    array: None,
                    enumm: Some("Ckmode"),
                },
            ],
        },
        FieldSet {
            name: "Chselr",
            extends: None,
            description: Some("channel selection register"),
            bit_size: 32,
            fields: &[Field {
                name: "chsel",
                description: Some("Channel-x selection"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 1,
                array: Some(Array::Regular(RegularArray { len: 19, stride: 1 })),
                enumm: None,
            }],
        },
        FieldSet {
            name: "Chselr1",
            extends: None,
            description: Some("channel selection register CHSELRMOD = 1 in ADC_CFGR1"),
            bit_size: 32,
            fields: &[Field {
                name: "sq",
                description: Some("conversion of the sequence"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 4,
                array: Some(Array::Regular(RegularArray { len: 8, stride: 4 })),
                enumm: Some("Sq"),
            }],
        },
        FieldSet {
            name: "Cr",
            extends: None,
            description: Some("ADC control register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "aden",
                    description: Some("ADC enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "addis",
                    description: Some("ADC disable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "adstart",
                    description: Some("ADC group regular conversion start"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "adstp",
                    description: Some("ADC group regular conversion stop"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "advregen",
                    description: Some("ADC voltage regulator enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 28 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "adcal",
                    description: Some("ADC calibration"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Dr",
            extends: None,
            description: Some("ADC group regular conversion data register"),
            bit_size: 32,
            fields: &[Field {
                name: "data",
                description: Some("ADC group regular conversion data"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 16,
                array: None,
                enumm: None,
            }],
        },
        FieldSet {
            name: "Ier",
            extends: None,
            description: Some("ADC interrupt enable register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "adrdyie",
                    description: Some("ADC ready interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eosmpie",
                    description: Some("ADC group regular end of sampling interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eocie",
                    description: Some("ADC group regular end of unitary conversion interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eosie",
                    description: Some("ADC group regular end of sequence conversions interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ovrie",
                    description: Some("ADC group regular overrun interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd1ie",
                    description: Some("ADC analog watchdog 1 interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd2ie",
                    description: Some("ADC analog watchdog 2 interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd3ie",
                    description: Some("ADC analog watchdog 3 interrupt"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eocalie",
                    description: Some("End of calibration interrupt enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ccrdyie",
                    description: Some("Channel Configuration Ready Interrupt enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Isr",
            extends: None,
            description: Some("ADC interrupt and status register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "adrdy",
                    description: Some("ADC ready flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eosmp",
                    description: Some("ADC group regular end of sampling flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eoc",
                    description: Some("ADC group regular end of unitary conversion flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eos",
                    description: Some("ADC group regular end of sequence conversions flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ovr",
                    description: Some("ADC group regular overrun flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd1",
                    description: Some("ADC analog watchdog 1 flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd2",
                    description: Some("ADC analog watchdog 2 flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "awd3",
                    description: Some("ADC analog watchdog 3 flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eocal",
                    description: Some("End Of Calibration flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ccrdy",
                    description: Some("Channel Configuration Ready flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Smpr",
            extends: None,
            description: Some("ADC sampling time register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "sample_time",
                    description: Some("Sampling time selection"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 3,
                    array: Some(Array::Regular(RegularArray { len: 2, stride: 4 })),
                    enumm: Some("SampleTime"),
                },
                Field {
                    name: "smpsel",
                    description: Some("Channel sampling time selection"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: Some(Array::Regular(RegularArray { len: 19, stride: 1 })),
                    enumm: Some("Smpsel"),
                },
            ],
        },
    ],
    enums: &[
        Enum {
            name: "Align",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "RIGHT",
                    description: Some("Right alignment"),
                    value: 0,
                },
                EnumVariant {
                    name: "LEFT",
                    description: Some("Left alignment"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Ckmode",
            description: None,
            bit_size: 2,
            variants: &[
                EnumVariant {
                    name: "ADCLK",
                    description: Some("ADCCLK (Asynchronous clock mode)"),
                    value: 0,
                },
                EnumVariant {
                    name: "PCLK_DIV2",
                    description: Some("PCLK/2 (Synchronous clock mode)"),
                    value: 1,
                },
                EnumVariant {
                    name: "PCLK_DIV4",
                    description: Some("PCLK/4 (Synchronous clock mode)"),
                    value: 2,
                },
                EnumVariant {
                    name: "PCLK",
                    description: Some("PCLK (Synchronous clock mode)"),
                    value: 3,
                },
            ],
        },
        Enum {
            name: "Dmacfg",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "ONE_SHOT",
                    description: Some("DMA one shot mode selected"),
                    value: 0,
                },
                EnumVariant {
                    name: "CIRCULAR",
                    description: Some("DMA circular mode selected"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Exten",
            description: None,
            bit_size: 2,
            variants: &[
                EnumVariant {
                    name: "DISABLED",
                    description: Some("Hardware trigger detection disabled"),
                    value: 0,
                },
                EnumVariant {
                    name: "RISING_EDGE",
                    description: Some("Hardware trigger detection on the rising edge"),
                    value: 1,
                },
                EnumVariant {
                    name: "FALLING_EDGE",
                    description: Some("Hardware trigger detection on the falling edge"),
                    value: 2,
                },
                EnumVariant {
                    name: "BOTH_EDGES",
                    description: Some("Hardware trigger detection on both the rising and falling edges"),
                    value: 3,
                },
            ],
        },
        Enum {
            name: "Extsel",
            description: None,
            bit_size: 3,
            variants: &[
                EnumVariant {
                    name: "TIM1_TRGO",
                    description: Some("Timer 1 TRGO event"),
                    value: 0,
                },
                EnumVariant {
                    name: "TIM1_CC4",
                    description: Some("Timer 1 CC4 event"),
                    value: 1,
                },
                EnumVariant {
                    name: "TIM2_TRGO",
                    description: Some("Timer 2 TRGO event"),
                    value: 2,
                },
                EnumVariant {
                    name: "TIM2_CH4",
                    description: Some("Timer 2 CH4 event"),
                    value: 3,
                },
                EnumVariant {
                    name: "TIM2_CH3",
                    description: Some("Timer 2 CH3 event"),
                    value: 5,
                },
                EnumVariant {
                    name: "EXTI_LINE11",
                    description: Some("EXTI line 11 event"),
                    value: 7,
                },
            ],
        },
        Enum {
            name: "Ovsr",
            description: None,
            bit_size: 3,
            variants: &[
                EnumVariant {
                    name: "MUL2",
                    description: Some("2x"),
                    value: 0,
                },
                EnumVariant {
                    name: "MUL4",
                    description: Some("4x"),
                    value: 1,
                },
                EnumVariant {
                    name: "MUL8",
                    description: Some("8x"),
                    value: 2,
                },
                EnumVariant {
                    name: "MUL16",
                    description: Some("16x"),
                    value: 3,
                },
                EnumVariant {
                    name: "MUL32",
                    description: Some("32x"),
                    value: 4,
                },
                EnumVariant {
                    name: "MUL64",
                    description: Some("64x"),
                    value: 5,
                },
                EnumVariant {
                    name: "MUL128",
                    description: Some("128x"),
                    value: 6,
                },
                EnumVariant {
                    name: "MUL256",
                    description: Some("256x"),
                    value: 7,
                },
            ],
        },
        Enum {
            name: "Ovss",
            description: None,
            bit_size: 4,
            variants: &[
                EnumVariant {
                    name: "NO_SHIFT",
                    description: Some("No shift"),
                    value: 0,
                },
                EnumVariant {
                    name: "SHIFT1",
                    description: Some("Shift 1-bit"),
                    value: 1,
                },
                EnumVariant {
                    name: "SHIFT2",
                    description: Some("Shift 2-bits"),
                    value: 2,
                },
                EnumVariant {
                    name: "SHIFT3",
                    description: Some("Shift 3-bits"),
                    value: 3,
                },
                EnumVariant {
                    name: "SHIFT4",
                    description: Some("Shift 4-bits"),
                    value: 4,
                },
                EnumVariant {
                    name: "SHIFT5",
                    description: Some("Shift 5-bits"),
                    value: 5,
                },
                EnumVariant {
                    name: "SHIFT6",
                    description: Some("Shift 6-bits"),
                    value: 6,
                },
                EnumVariant {
                    name: "SHIFT7",
                    description: Some("Shift 7-bits"),
                    value: 7,
                },
                EnumVariant {
                    name: "SHIFT8",
                    description: Some("Shift 8-bits"),
                    value: 8,
                },
            ],
        },
        Enum {
            name: "Presc",
            description: None,
            bit_size: 4,
            variants: &[
                EnumVariant {
                    name: "DIV1",
                    description: Some("Input ADC clock not divided"),
                    value: 0,
                },
                EnumVariant {
                    name: "DIV2",
                    description: Some("Input ADC clock divided by 2"),
                    value: 1,
                },
                EnumVariant {
                    name: "DIV4",
                    description: Some("Input ADC clock divided by 4"),
                    value: 2,
                },
                EnumVariant {
                    name: "DIV6",
                    description: Some("Input ADC clock divided by 6"),
                    value: 3,
                },
                EnumVariant {
                    name: "DIV8",
                    description: Some("Input ADC clock divided by 8"),
                    value: 4,
                },
                EnumVariant {
                    name: "DIV10",
                    description: Some("Input ADC clock divided by 10"),
                    value: 5,
                },
                EnumVariant {
                    name: "DIV12",
                    description: Some("Input ADC clock divided by 12"),
                    value: 6,
                },
                EnumVariant {
                    name: "DIV16",
                    description: Some("Input ADC clock divided by 16"),
                    value: 7,
                },
                EnumVariant {
                    name: "DIV32",
                    description: Some("Input ADC clock divided by 32"),
                    value: 8,
                },
                EnumVariant {
                    name: "DIV64",
                    description: Some("Input ADC clock divided by 64"),
                    value: 9,
                },
                EnumVariant {
                    name: "DIV128",
                    description: Some("Input ADC clock divided by 128"),
                    value: 10,
                },
                EnumVariant {
                    name: "DIV256",
                    description: Some("Input ADC clock divided by 256"),
                    value: 11,
                },
            ],
        },
        Enum {
            name: "Res",
            description: None,
            bit_size: 2,
            variants: &[
                EnumVariant {
                    name: "BITS12",
                    description: Some("12 bits"),
                    value: 0,
                },
                EnumVariant {
                    name: "BITS10",
                    description: Some("10 bits"),
                    value: 1,
                },
                EnumVariant {
                    name: "BITS8",
                    description: Some("8 bits"),
                    value: 2,
                },
                EnumVariant {
                    name: "BITS6",
                    description: Some("6 bits"),
                    value: 3,
                },
            ],
        },
        Enum {
            name: "SampleTime",
            description: None,
            bit_size: 3,
            variants: &[
                EnumVariant {
                    name: "CYCLES1_5",
                    description: Some("1.5 ADC clock cycles"),
                    value: 0,
                },
                EnumVariant {
                    name: "CYCLES3_5",
                    description: Some("3.5 ADC clock cycles"),
                    value: 1,
                },
                EnumVariant {
                    name: "CYCLES7_5",
                    description: Some("7.5 ADC clock cycles"),
                    value: 2,
                },
                EnumVariant {
                    name: "CYCLES12_5",
                    description: Some("12.5 ADC clock cycles"),
                    value: 3,
                },
                EnumVariant {
                    name: "CYCLES19_5",
                    description: Some("19.5 ADC clock cycles"),
                    value: 4,
                },
                EnumVariant {
                    name: "CYCLES39_5",
                    description: Some("39.5 ADC clock cycles"),
                    value: 5,
                },
                EnumVariant {
                    name: "CYCLES79_5",
                    description: Some("79.5 ADC clock cycles"),
                    value: 6,
                },
                EnumVariant {
                    name: "CYCLES160_5",
                    description: Some("160.5 ADC clock cycles"),
                    value: 7,
                },
            ],
        },
        Enum {
            name: "Scandir",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "UPWARD",
                    description: Some("Upward scan (from CHSEL0 to CHSEL17)"),
                    value: 0,
                },
                EnumVariant {
                    name: "BACKWARD",
                    description: Some("Backward scan (from CHSEL17 to CHSEL0)"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Smpsel",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "SMP1",
                    description: Some("Sampling time of CHANNELx use the setting of SMP1 register"),
                    value: 0,
                },
                EnumVariant {
                    name: "SMP2",
                    description: Some("Sampling time of CHANNELx use the setting of SMP2 register"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Sq",
            description: None,
            bit_size: 4,
            variants: &[
                EnumVariant {
                    name: "CH0",
                    description: Some("Channel 0 selected for the Nth conversion"),
                    value: 0,
                },
                EnumVariant {
                    name: "CH1",
                    description: Some("Channel 1 selected for the Nth conversion"),
                    value: 1,
                },
                EnumVariant {
                    name: "CH2",
                    description: Some("Channel 2 selected for the Nth conversion"),
                    value: 2,
                },
                EnumVariant {
                    name: "CH3",
                    description: Some("Channel 3 selected for the Nth conversion"),
                    value: 3,
                },
                EnumVariant {
                    name: "CH4",
                    description: Some("Channel 4 selected for the Nth conversion"),
                    value: 4,
                },
                EnumVariant {
                    name: "CH5",
                    description: Some("Channel 5 selected for the Nth conversion"),
                    value: 5,
                },
                EnumVariant {
                    name: "CH6",
                    description: Some("Channel 6 selected for the Nth conversion"),
                    value: 6,
                },
                EnumVariant {
                    name: "CH7",
                    description: Some("Channel 7 selected for the Nth conversion"),
                    value: 7,
                },
                EnumVariant {
                    name: "CH8",
                    description: Some("Channel 8 selected for the Nth conversion"),
                    value: 8,
                },
                EnumVariant {
                    name: "CH9",
                    description: Some("Channel 9 selected for the Nth conversion"),
                    value: 9,
                },
                EnumVariant {
                    name: "CH10",
                    description: Some("Channel 10 selected for the Nth conversion"),
                    value: 10,
                },
                EnumVariant {
                    name: "CH11",
                    description: Some("Channel 11 selected for the Nth conversion"),
                    value: 11,
                },
                EnumVariant {
                    name: "CH12",
                    description: Some("Channel 12 selected for the Nth conversion"),
                    value: 12,
                },
                EnumVariant {
                    name: "CH13",
                    description: Some("Channel 13 selected for the Nth conversion"),
                    value: 13,
                },
                EnumVariant {
                    name: "CH14",
                    description: Some("Channel 14 selected for the Nth conversion"),
                    value: 14,
                },
                EnumVariant {
                    name: "EOS",
                    description: Some("End of sequence"),
                    value: 15,
                },
            ],
        },
    ],
};
